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I was investigating on the same question here , but I was not very clear of what I was asking, even for myself. Sorry for those who spent time answering my unclear question.

So let's try again with a more realistic example. We consider this structure:

Where the main Makefile is:

all: src/foobar    
src/foobar:
        make -C $(dir $@)
And the sub-makefile is:
foobar: foo bar
        join $^ > $@
If I run make for the first time (from ./) everything works as expected, foobar is produced.
$ make
make -C src/
make[1]: Entering directory '/project/src'
join foo bar > foobar
make[1]: Leaving directory '/project/src'
$ make
make: Nothing to be done for 'all'.
However if I touch any of the foobar dependencies. The parent Makefile will not regenerate the target. Here, I perfectly understand the behavior of Make, but I want to tell it to be aware of foobar' dependencies. 
$ touch src/foo
$ make
make: Nothing to be done for 'all'.
My current solution which is not very neat is to ask for the dependencies. So the src/Makefile become:
src=foo bar
foobar: $(src)
    @echo "Joining"
    join $^ > $@
files: $(src)
    @echo $^
And the ./Makefile:
all: src/foobar
src=$(addprefix src/,$(shell make --no-print-directory -C src files | tr '\n' ' '))
src/foobar: $(src)
    make -C $(dir $@)
I must also say that this particular example could be simplified using a single Makefile only. My real example is quite more complex. The src/Makefile generate an executable while the parent Makefile do lots of other things (packing in a specific format, generate the documentation, build other sub-makefiles and so on). Thus, I want to keep these tasks well separated and I need to different Makefiles. 
                Why do you bother with a sub-makefile in the first place ? Can't the top-level one simply do the job ?
– Chnossos
                Jul 8, 2015 at 13:15
                @Chnossos have you read the last part of my question? I need to have two makefiles because they do a very different job.
– nowox
                Jul 8, 2015 at 13:21
In the main Makefile create a dependency for the child target or directory that is always in need of building, and let the child Make then do the real work.    
There is a good example here: http://owen.sj.ca.us/~rk/howto/slides/make/slides/makerecurs.html.
To translate for your case, change your main Makefile to be:
all: src/foobar
src/foobar: force
    $(MAKE) $(MFLAGS) -C src
force:
I also added $(MFLAGS) which will pass same flags from parent to child make.
        
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